%% "Jose Maria Rodriguez Millan" <[EMAIL PROTECTED]> writes:
jmrm> For example,if each lib directory has a src subdirectory
jmrm> (a/src,b/src,c/src) ,i can get the list of prerrequisites with
jmrm> $(subst .cc,.o,$(wildcard $(addsuffix /src/*.cc,$(@D))))
jmrm> but this expression seems not to work if written as
jmrm> prerrequisite (i suppose because $(@D) is defined only when
jmrm> command execution begins.
Correct.
jmrm> If it were so ,would not be interesting to have target-related
jmrm> variables already defined when computing prerrequisites?))
There is a patch which will be integrated into the next version of GNU
make which does this, more or less.
jmrm> $(PROJECTLIBS) : <calculate prerrequisites,based in current target path>
jmrm> <commands>
jmrm> Is this possible?Is there any other way to do the same thing?
The only way to do this is with recursion. Have one instance of make
generate a makefile that contains the prerequisite definitions, then
recurse and include it.
GNU make has a feature where it automatically tries to generate its
included makefiles; you can use this to get what you want here. Have a
rule that builds this makefile part, then include that makefile part.
Make will rebuild the makefile part automatically when it's deemed out
of date, then re-exec itself to read the new value.
--
-------------------------------------------------------------------------------
Paul D. Smith <[EMAIL PROTECTED]> Find some GNU make tips at:
http://www.gnu.org http://www.paulandlesley.org/gmake/
"Please remain calm...I may be mad, but I am a professional." --Mad Scientist
_______________________________________________
Help-make mailing list
[EMAIL PROTECTED]
http://mail.gnu.org/mailman/listinfo/help-make
