Hi,
Our project consists of many makefiles including a central makefile.template
that contains a lot of rules that are common for all subprojects. For
binaries each specific makefile has to written like this:
---
bins= mybin1 mybin2
include makefile.template
mybin1: x1.o x2.o x3.o
mybin2: y1.o y2.o
---
makefile.template contains a rule:
----
$(bins):
$(CC) $^ $(LDFLAGS) $(LIBS) -o $@
---
Ok that works all fine.
But next I like to write a second rule for producing a static version with
the suffix ".static" for all binaries. To write a working rule I would need
something like a function $(dependencies target). In my case I could use it
like this:
%.static: %
$(CC) $(dependencies $<) -static $(LDFLAGS) $(LIBS) -o $@
Does any function exist to get the dependencies of a different target, or is
there a much better solution for me ?
Cheers,
Uwe
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