Hello all, I have a client that, despite my strong advice to the contrary, wants a make system that will simply build every file in the source tree (in this case inside ClearCase). Instead of maintaining a list of dependencies in the makefile they simply want to add a set of files to the source tree and be able to type "make all".
Has anyone out there done anything like this natively in make without having to run a bunch of foreach iterations? Their expectations are that every .c or .s file will yield a .o file and all the .o files will be used to generate one large .a file. I created one makefile that used $(wildcard) constructs to generate a list of dependencies but it is a real hack and at times causes buffer overflows since the list is so long: find_c_files = $(wildcard $(dir)/*.c) find_s_files = $(wildcard $(dir)/*.s) # Find all the *.c and *.s files in the base directories. c_files = $(foreach dir, $(dirs), $(find_c_files)) s_files = $(foreach dir, $(dirs), $(find_s_files)) # Take list of *.c & *.s files and make list of *.o files. c_objects = $(patsubst %.c,%.o, $(c_files)) s_objects = $(patsubst %.s,%.o, $(s_files)) Thanks much in advance, Bryan -- Bryan Miller Sr. Staff Software Engineer Rational Software Corporation _______________________________________________ Help-make mailing list [EMAIL PROTECTED] http://mail.gnu.org/mailman/listinfo/help-make
