On Thu, Sep 16, 2004 at 05:00:32PM +0100, David Kilroy wrote:
> My new problem, still related to computed variables, eval, call and friends > is shown below. In this case the dependencies of a target do not appear to > be expanded correctly. These things are tricky. I have been recently wrestling with very similar issues. Here's the fix. $$($(1)_TGT) : $$($(1)_OBJS) I got this output. Sources are foo.c Objects are foo.o Flags are bar foo.o depends on foo.o HTH, Ken > I've tried various combinations of adding extra $, and using the value > function to no avail. Any help appreciated. > > Thanks, > > Dave. > > dkilroy > $ cat Makefile > > FOO_SRCS=foo.c > > define TEMPLATE > $(1)_OBJS=$$($(1)_SRCS:.c=.o) > $(1)_TGT = foo > > $$($(1)_TGT) : $(1)_FLAG=bar > $$($(1)_TGT) : $(value $(1)_OBJS) > endef > > $(eval $(call TEMPLATE,FOO)) > > all: foo > > foo : > @echo Sources are $(FOO_SRCS) > @echo Objects are $(FOO_OBJS) > @echo Flags are $(FOO_FLAG) > @echo foo.o depends on $^ > > dkilroy > $ make > Sources are foo.c > Objects are foo.o > Flags are bar > foo.o depends on > > dkilroy > $ > > > _______________________________________________ > Help-make mailing list > [EMAIL PROTECTED] > http://lists.gnu.org/mailman/listinfo/help-make _______________________________________________ Help-make mailing list [EMAIL PROTECTED] http://lists.gnu.org/mailman/listinfo/help-make
