You need to comment the automatic variables so they are not expanded
when the rule is eval'ed.
I tend to write makefiles in this order: variables, rules, targets,
prerequisites.
define test-rule
$(1)/%.o : %.c
@echo test-rule
@echo Arg 1 : $(1)
@echo Target : $$@
@echo Dependent : $$<
endef
$(eval $(call test-rule,bin))
ALL : TEST
TEST : bin/File.o
bin/File.o : File.c
This does what you want.
-- Ted
On 5 Aug 2005 at 10:45 UTC-0700, Jon Chatten wrote:
> Hi,
>
> I'm using GNU make 3.80 on Windows, but am having some
> issues with Dynamic Rules. This is probably down to
> my own misunderstanding, but consider the following
> (contrived! I do have a reason for trying this :-))
> example:
>
>
> ALL : TEST
>
> define test-rule
> $(1)/%.o : %.c
> @echo test-rule
> @echo Arg 1 : $(1)
> @echo Target : $@
> @echo Dependent : $<
> endef
>
> TEST : bin/File.o
> bin/File.o : File.c
>
> $(eval $(call test-rule,bin))
>
>
> Now...this gives the following output, with a File.c
> in the cwd:
>
>
> test-rule
> Arg 1 : bin
> Target :
> Dependent :
>
>
> Which leads me to believe the rule is created
> correctly and invoked as you'd expect, but why are $<
> and $@ empty?
>
> Thanks,
> Jon.
>
>
>
>
>
> ___________________________________________________________
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--
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