Thanks for reply.
changed MAKETARGET="${MAKETARGET}" to MAKETARGET='${MAKETARGET}'. but still
it didnt work.
MAKETARGET='g++ -o ././libSampleSoD.so -shared -Wl,-Bsymbolic
-Wl,-rpath,'$ORIGIN:$ORIGIN/../lib:.:../lib' ./obj/debug/sample.o -ldl
-lpthread -lgcc'
g++ -o ././libSampleSoD.so -shared -Wl,-Bsymbolic -Wl,-rpath,*
:/../lib:.:../lib* ./obj/debug/sample.o -ldl -lpthread -lgcc
i want shell not to expand $ORIGIN. like:
g++ -o ././libSampleSoD.so -shared -Wl,-Bsymbolic -Wl,-rpath,*
'$ORIGIN:$ORIGIN/../lib:.:../lib'* ./obj/debug/sample.o -ldl -lpthread
-lgcc
mrc
On 8/15/07, Paul Smith <[EMAIL PROTECTED]> wrote:
> On Wed, 2007-08-15 at 09:39 +0530, m c wrote:
> > tried using $$$ but that too didnt work.
> > TARGETNAME="libSampleSoD.so" MAKETARGET="g++ -o ././libSampleSoD.so
> > -shared -Wl,-Bsymbolic -Wl,-rpath,'$RIGIN:
> > $RIGIN/../lib:.:../lib' ./obj/debug/sample.o -ldl -lpthread -lgcc"
> > \
>
> Your setup is extremely complicated, but it boils down to a simple
> escaping problem. Escaping in make has an added twist because both make
> and the shell (that make invokes to run commands) use "$" to introduce
> variables, so you have to quote for both the shell and for make.
>
> Here is what you have:
>
> RPATHFLAG := $$ORIGIN:$$ORIGIN/../lib:$(RPATHFLAG)
>
> The := causes this to be evaluated immediately and (assuming RPATHFLAG
> is not set) you get RPATHFLAG set to "$ORIGIN:$ORIGIN/../lib:"
>
> Next you have this:
>
> dynamicdebug : MAKETARGET = ${OSCPP} ...
> $(RPATHFLAG_PREFIX)'$(RPATHFLAG)$(RPATHFLAG_EXTRAS)' ...
>
> Since this using "=", it's not evaluated here and the variable holds the
> string as written.
>
> Finally, you have this:
>
> dynamicdebug ... :
> ... MAKETARGET="${MAKETARGET}" ... $(MAKE) -f Make.mk
> @echo "$@ version built."
>
> Now make will evaluate this command script, which means expanding
> ${MAKETARGET} and hence $(RPATHFLAG). However, since RPATHFLAG was
> already expanded once (because of the :=) it's not expanded again, which
> means that the command line make passes to the shell (assuming all the
> other variables besides RPATHFLAG are empty and MAKE = make) is:
>
> MAKETARGET="$ORIGIN:$ORIGIN/../lib:" make -f Make.mk
>
> Now, the shell will take over and it will see that $ORIGIN is a valid
> shell variable and the *shell* will expand it, to the empty string...
> and there's your problem right there.
>
> It's not clear what you WANT to happen, so I can't say how you should
> fix it. If you want the MAKETARGET variable to contain the "$ORIGIN"
> reference as a literal string, you should use something like:
>
> dynamicdebug ... :
> ... MAKETARGET='${MAKETARGET}' ... $(MAKE) -f
> Make.mk
> @echo "$@ version built."
>
> Using single quotes around the variable means the shell won't expand it;
> the command the shell sees is:
>
> MAKETARGET='$ORIGIN:$ORIGIN/../lib:' make -f Make.mk
>
> --
>
> -------------------------------------------------------------------------------
> Paul D. Smith <[EMAIL PROTECTED]> Find some GNU make tips at:
> http://www.gnu.org http://make.paulandlesley.org
> "Please remain calm...I may be mad, but I am a professional." --Mad
> Scientist
>
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