Hello,
in my Makefiles, the pattern rule for compiling C sources has the exact
compiler command hidden behind a clean custom output like "[CC] main.o..."
to reduce visual clutter.
This is a stripped-down Makefile:
========================
CFLAGS += -DFOO -DBAR
%.o : %.c
@echo "[CC] [EMAIL PROTECTED]"; \
$(CC) -c -o $@ $(CFLAGS) $<
test: test.o
@echo "[LD] [EMAIL PROTECTED]"
@#actually link target here
========================
Now, from time to time I'd like to see the exact compiler command-line,
for example for inspecting certain CFLAGS entries which may not be given that
obvious like in the example above.
For this, I'd need to remove the '\' character in the middle line of the
pattern rule, so that the $(CC) line is not hidden behind the '@' anymore.
Now my question is: Can I achieve this without having to find that '\'
character and remove it inbetween the pattern rule? I'd like to be able to
activate this feature by some environment variable, like:
$ SHOW_CMD=1 make
I was trying to define some variable with a '\' in it and place it there
programmatically, but I couldn't get it to work:
## tried both with and without a trailing space in this var,
## and with one as well as two '\' chars
BS:=\
%.o : %.c
@echo "[CC] [EMAIL PROTECTED]"; $(BS)
$(CC) -c -o $@ $(CFLAGS) $<
$ make
[CC] test.o...
/bin/sh: : command not found
make: *** [test.o] Fehler 127
Surely this must be possible?
--
Martin Willers
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