Todd Showalter wrote:
We're case b, but the problem remains. I'll try to give a more
concrete example:
Say we've got an environment variable, $BUILD_NETWORK_SUPPORT, and
it's currently set to 0. Within the makefile we have
CFLAGS+= -DBUILD_NETWORK_SUPPORT=$(BUILD_NETWORK_SUPPORT)
Within a C file we have:
#if (BUILD_NETWORK_SUPPORT == 1)
#include "Network.h"
#else
#include "Network.Stub.h"
#endif
Now say on the command line I do:
make
export BUILD_NETWORK_SUPPORT=1
make
The second invocation of make will not detect the change, and the
dependencies will be wrong.
Simple solution:
- write down the current parameter settings that will be changed via
Makefile parameters into a file (e.g. echo -en "$(CFLAGS)" >
compile_settings.txt; syntax might be wrong, just to show what I want to
express)
- read the file and compare it to the "current" settings string. If
different do a clean and then a make and sync the file with the most recent
parameters
You just need a function in your makefile how to create the string and how
to read the file and compare it and what to do if it has changed.
Should be possible to be solved with pure make.
Best regards,
Erik
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