I have a set of Makefiles I've used for years with /usr/ccs/bin/make that I am
now trying to get to work with GNU make so I can port from Solaris to Linux. My
directory structure is:
project:
objs/
src/
lib/
objs:
release/
debug/
If project is a library, then my Makefile boils down to:
TARGET = someLibrary
SRC = foo.cpp foo2.cpp foo3.cpp
LIB_DIR = ../$(TARGET)/lib
OBJ_DIR = ../$(TARGET)/obj
OBJ_RELEASE_DIR = release
#This next line appears to work. For /usr/ccs/bin/make I used:
# OBJS = $(SRC:%.cpp=${OBJ_DIR}/${OBJ_RELEASE_DIR}/%.o)
OBJS = $(patsubst %.cpp,$(OBJ_DIR)/$( OBJ_RELEASE_DIR)/%.o,$(SRC))
#This is the part that doesn't work. I've tried $^, $< but they resolve to
blank space instead of
#the desired name of the cpp file.
$(OBJS): $(patsubst %.o,%.cpp,$(notdir $@))
g++ -c $^ -o $@
#I used to use this line
#${OBJS}: $...@f:%.o=%.cpp}
# g++ -c ${*F}.cpp -o $@
$(LIB_DIR)/lib$(TARGET).a: $(OBJS)
#command to link together the library
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