I'm trying to use .SECONDEXPANSION to create pattern rules for which the
prerequisites list is a function of the target. But things don't work
exactly as I expect. Here is an example of a makefile that causes make
to apparently enter an infinite loop:
.SECONDEXPANSION:
all: foo.a
%.a: $$(@:%.a=%.o)
I can't understand why make would go into an infinite loop with the
above. Shouldn't it be using the pattern rule to generate this rule:
foo.a: $(@:%.a=%.o)
and then doing a second expansion of $(@:%.a=%.o) with $@ equal to foo.a?
And if so, wouldn't that result in a prerequisite of foo.o?
Here is another example:
.SUFFIXES:
.PRECIOUS: %.c %.o
all: foo.a
%.c:
echo > $@
%.o: %.c
gcc -o $@ -c $<
.SECONDEXPANSION:
%.a: $$(patsubst %.a,%.o,$$@)
ar cr $@ $^
This makefile produces this output:
echo > %.c
gcc -o %.o -c %.c
ar cr foo.a %.o
So make is using the pattern rule for %.a when figuring out how to build
foo.a, but in the substitution that it does to determine the
prerequisites it is using % instead of foo. I don't get it.
Thanks,
Bryan
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