Hello,
Can you please tell me what I misunderstand? For some reason, when I run make
with the makefile below, the pattern rule is not properly created to depend
upon the value of PREREQ. I have examined the output of "make -dpr" and see
that the makefile tries to evaluate the literal text of "$PREREQ" instead of
the value of the variable. When I replace the quadruple "$$$$" with a double
"$$", then the evaluations that occur during the "call" and the "eval" evaluate
the value or PREREQ at the time of expansion, but using the quadruple "$$$$"
leaves in the actual text of "$PREREQ" instead of a reference to evaluate at
run time.
Thank you,
Darren
-------------------------
define rule
%.o: %$(1) $$$$(PREREQ)
touch $$@
endef
$(eval $(call rule,.c))
all: a.o
%.o: PREREQ = b.o
-------------------------
--
Darren Hiebert
(256) 327-6520
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