Hello,

In order to increase the efficiency of the build, I added empty recipes to my makefiles to prevent 'make' from trying to remake source files:

$(VPATH)/configure $(VPATH)/Makefile.in $(VPATH)/doc/$(pkgname).texi : ;
%.h %.cc : ;

It works. The output of 'make -d' is reduced to less than 1/4 of its original size.

The problem is that the second rule above breaks detection of invalid targets:

Expected:
$ make -n foobar
make: *** No rule to make target `foobar'.  Stop.

Obtained:
$ make -n foobar
g++  -Wall -W -O2 -c -o foobar.o foobar.cc
cc   foobar.o   -o foobar
rm foobar.o foobar.cc

Is there a way to tell make with an implicit rule to not try to remake source files? For example files with extensions .h and .cc.

An explicit rule listing all the source files as targets and with an empty recipe works. But a simple implicit rule would be much better if it could be made to work without side effects.

Thanks,
Antonio.

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