Dear Candidate,
My name is Gagan & I am working as a *Technical Recruiter* with *Spectraforce*, currently we are having very urgent requirement with us for the position of "*Pre-Silicon verification Engineer*". Kindly let me know if you are comfortable with the below mentioned job details: *Position: **Pre-Silicon verification Engineer* *Location: **San Jose, CA* *Duration: 6+ Months* *Description:* · At least 4+ years experience in pre-silicon verification · Expertise in Building scalable HVL based verification environment from Scratch using System Verilog OVM/UVM · Good experience in System Verilog OVM/UVM based verification environment development · Sound understanding of Random and constrained random-verification concepts · Experience with assertion based verification would be a plus · Understanding PCI-E, USB, SATA, DDR3 type protocols would be a plus · Driving the verification environment architecture · Creating test scenarios(System Verilog OVM · Work with RTL teams to debug verification failures · Review and ensure that expected Code and functional coverage metrics are achieved Thanks and Regards, Gagan Deep Sharma|Technical Recruiter Spectraforce Technologies Inc. 5511 Capital Center Drive, Suite 340 Raleigh, NC. 27606 Email: [email protected] Phone: 919-887-6786 X 4112 Skype: Sky_Lamp30 www.spectraforce.com -- You received this message because you are subscribed to the Google Groups "as400placements1" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To post to this group, send an email to [email protected]. Visit this group at http://groups.google.com/group/hrccpl. For more options, visit https://groups.google.com/groups/opt_out.
