lstopo on our opteron 275 login node gives the following output
System(7870MB)
Node#0(3906MB) + Socket#0
L2(1024KB) + L1(1024KB) + Core#0 + P#0
L2(1024KB) + L1(1024KB) + Core#1 + P#1
Node#1(4040MB) + Socket#1
L2(1024KB) + L1(1024KB) + Core#0 + P#2
L2(1024KB) + L1(1024KB) + Core#1 + P#3
If I am reading the AMD docs right, the L1 cache for each core should
be smaller, and in two parts, (data and instruction cache)
Also appears that L2 should be shared, as far as I can tell, it is not
shared in this case.
Am I looking at this wrong?
Brock Palen
www.umich.edu/~brockp
Center for Advanced Computing
bro...@umich.edu
(734)936-1985
