I don't know the answer but I'm happy to test on my ARM systems if you have an experiment to perform.
Right now, I have an NVIDIA Kayla board and a Parallella board, both of which are ARMv7. Jeff On Tue, Jan 28, 2014 at 6:51 AM, Jeff Squyres (jsquyres) <jsquy...@cisco.com> wrote: > I passed this on to my OMPI ARM contact (Leif Lindholm). Here's what he said: > > "It gets a bit trickier on ARM... since we may also have (implementation > time) configurable cache sizes and also big.LITTLE (different processor > models executing in the same SMP system)." > > He passed the question on to another ARM guy, asking for further detail. > I'll pass on what he says. > > > > On Jan 28, 2014, at 3:39 AM, Brice Goglin <brice.gog...@inria.fr> wrote: > >> Hello, >> >> Is anybody familiar with ARM CPUs? >> >> I am adding more CPU information because Intel needs more: >> CPUVendor=GenuineIntel >> CPUModel=Intel(R) Xeon(R) CPU E5-2680 0 @ 2.70GHz >> CPUModelNumber=45 >> CPUFamilyNumber=6 >> >> Would something similar be useful for ARM? What are the fields below >> from /proc/cpuinfo on ARM that would be useful to developers? >> Processor : Marvell PJ4Bv7 Processor rev 1 (v7l) >> BogoMIPS : 1196.85 >> Features : swp half thumb fastmult vfp edsp vfpv3 vfpv3d16 tls >> CPU implementer : 0x56 >> CPU architecture: 7 >> CPU variant : 0x1 >> CPU part : 0x581 >> CPU revision : 1 >> Hardware : Marvell Armada-370 >> Revision : 0000 >> Serial : 0000000000000000 >> >> thanks >> Brice >> >> _______________________________________________ >> hwloc-users mailing list >> hwloc-us...@open-mpi.org >> http://www.open-mpi.org/mailman/listinfo.cgi/hwloc-users > > > -- > Jeff Squyres > jsquy...@cisco.com > For corporate legal information go to: > http://www.cisco.com/web/about/doing_business/legal/cri/ > > _______________________________________________ > hwloc-users mailing list > hwloc-us...@open-mpi.org > http://www.open-mpi.org/mailman/listinfo.cgi/hwloc-users -- Jeff Hammond jeff.scie...@gmail.com
