Paul Gilmartin wrote: > On Tue, 25 May 2010 16:38:32 -0400, David Andrews wrote: > > >On Tue, 2010-05-25 at 16:10 -0400, Tom Marchant wrote: > >> The 68000 and its successors are big endian. > >> They switched to PowerPC in 1994 and to i86 in 2006. > > > >Didn't PPC go both ways? (I vaguely remember a talk by David Barnes a > >few years ago, where he mentioned the OS/2 PPC port making use of the > >mixed-endian-ness of PPC.) > > > Yow! I knew it was bimodal, but: > > http://en.wikipedia.org/wiki/PowerPC#Endian_modes > > In little-endian mode, the three lowest-order bits of the > effective address are exclusive-ORed with a three bit value > selected by the length of the operand. This is enough to > appear fully little-endian to normal software. > > I suppose "three lowest-order bits" means the rightmost three > bits in big-endian mode, and something somewhat different in > little-endian.
Nope, it always means the three rightmost bits of an address. Bytes get reordered when data is moved between memory and a register. The hardware still runs big-endian. > > > There's one bit that controls the endianness in supervisor > state; another for problem state. In the embedded version of the Power architecture, byte ordering is an attribute of a page. Power is not the only chip architecture that supports some sort of bi-endianess. Itanium, which is mainly little-endian, supports big-endian memory references. > > > --gil > Regards, Henry ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@bama.ua.edu with the message: GET IBM-MAIN INFO Search the archives at http://bama.ua.edu/archives/ibm-main.html
