On Wed, Dec 15, 2010 at 12:58 PM, Sam Siegel <s...@pscsi.net> wrote:

>
>
> On Wed, Dec 15, 2010 at 12:40 PM, Tom Marchant 
> <m42tom-ibmm...@yahoo.com>wrote:
>
>> On Wed, 15 Dec 2010 11:33:18 -0800, Sam Siegel wrote:
>>
>> >R2 is set incorrectly.  It needs to be loaded as follows:
>> >           using PSA,R0      include macro: IHAPSA
>> >           L    R2,FLCCVT   r2 = address of CVT
>> >           drop r0
>> > --> Delete or comment out this line        L     R2,CVTPTR
>> LOAD
>> >UP CVT ADDRESS
>>
>> Nope.  Either code produces the same result.
>>
>> Tom, I'm confused about your comment above.  The original post (shown
> below) never loaded register 2 and therefore has the value provided by the
> caller.  In this case, the OP indicated it is a batch job.  Wouldn't that
> tend to produce random values in R2?  Which in turn would tend to have
> CVTPTR address random storage locations?
>

My bad ... I should read the DOC ... it is an  equate to 16.

>
> Thanks,
> Sam
>
>         TITLE 'CVTUSER TEST'
>         CVT DSECT=YES,LIST=YES  .CVT DSECT
> Y        CSECT ,
> *
> *   REGISTER EQUATES
> *
> R0       EQU   0               .
> R1       EQU   1               .
> R2       EQU   2               .CVT ADDRESS
> R3       EQU   3               .CVTUSER ADDRESS
> R4       EQU   4               .
> R9       EQU   9               .BASE ADDRESS OF THIS EXIT
> R10      EQU   10              .
> R15      EQU   15              .
> *
>
>         SAVE  (14,12),,X_V1.0_&SYSDATE  SAVE & ID
>         LR    R9,R15          .SET UP ADDRESSABILITY
>         USING Y,R9            .SET UP ADDRESSABILITY
>         USING CVT,R2          .CVT DSECT
> *
>         MODESET KEY=ZERO,MODE=SUP
> *
>
>         L     R2,CVTPTR           LOAD UP CVT ADDRESS
>         L     R3,CVTUSER          LOAD CVTUSER ADDRESS
> * move 4 characters to CVTUSER
>         MVC   R3(4),=C'TEST'
>         RETURN (14,12),RC=0   .RETURN TO CALLER
>         LTORG
> PATCH    DC    2D'0'           .16 BYTE PATCH AREA
>         END
>
>
>> --
>>
>> Tom Marchant
>>
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>
>

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