> -----Original Message-----
> From: IBM Mainframe Discussion List 
> [mailto:[email protected]] On Behalf Of Monika Amiss
> Sent: Tuesday, March 29, 2011 12:07 PM
> To: [email protected]
> Subject: binary add
> 
> Dear group,
> 
>   I'm reading some SMF30 records and want to accumulate 
> several 4 byte binary values (like CPU SU, IO SU, ...) for 
> jobs which achieve the same criteria. But the summation grows 
> over the 4 byte capacity (I use AR in Amode31). Is there a 
> way to use 2 register for the summation. Or can I use 
> Amode64-Code only for the addition. I fear to consume to much 
> resources if I convert the data to decimal each time.
> 
>   Hope somebody could help me. Any hint appreciated.
>   With best regards
>   Monika    

If you are on a z, you can use 64 bit arithmetic. It has nothing to do with 
AMODE. You can use 64 bit arithmetic even in 24 or 31 bit addressing mode. Eg.

Instead of:

        L       R2,FULLWORD1
        A       R2,FULLWORD2
        ST      R2,RESULT

you could do:

        LGF     R2,FULLWORD1 LOAD 64 BIT R2 FROM 32 BIT FULLWORD1
        AGF     R2,FULLWORD2 ADD 32 BIT FULLWORD2 TO 64 BIT R2
        STG     R2,DOUBLEWORD SAVE 64 BIT RESULT

or

        LGF     R2,FULLWORD1 LOAD 32 BIT FULLWORD INTO 64 BIT R2 WITH SIGN 
EXTENTION
        LGF     R3,FULLWORD2 SAME WITH R3
        AGR     R2,R3 ADD TWO 64 BIT REGISTERS

note. Do __NOT__ do:

        L       R2,FULLWORD1
        L       R3,FULLWORD2
        AGR     R2,R3

In the above, the L to load loads only 32 bits and does not clear or sign 
extend the high order fullword of the registers. So that the AGR adds the 64 
bit registers with the "left over" contents in the high words of R2 and R3. If 
you have a 32 bit value in a register, use the LGFR instruction to "sign 
extend" that value into the high word before doing 64 bit arithmetic. You can 
even LGFR Rx,Rx to sign extend a value into the same register. Also keep in 
mind that all GP registers on a z are 64 bits in size. It's just that some 
instructions do not disturb the high (or sometimes the low) fullword bits.

In the past, on non-z equipment, I have done 64 bit arithmetic. 

        L       R2,FULLWORD1
        SRDA    R2,32           64 BIT VALUE IN R2/R3
        L       R4,FULLWORD2
        SRDA    R4,32           64 BIT VALUE IN R4/R5
        ALR     R4,R2           ADD HIGH WORD
        ALR     R5,R3           ADD LOW WORD
        BNO     AROUND  NO OVERFLOW (CARRY)
        AL      R4,=F'1'        LOW WORD OVERFLOW - CARRY 
AROUND DS   0H
        

--
John McKown 
Systems Engineer IV
IT

Administrative Services Group

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