dcrayf...@gmail.com (David Crayford) writes: > http://www.redbooks.ibm.com/redbooks/pdfs/sg246515.pdf > > There is one programming aspect that is relevant, although only > slightly linked to the use of a split cache. For many years, it has > been an axiom among S/360 - S/390 users that assembly language > programmers probably produce faster code than high-level language > compilers. This is no longer true. Processors that use pipelines > (including z800 and z900 machines) require a certain amount of > nonsequential code to obtain the best performance. For example, if an > instruction loads a register and the next instruction uses the > register, we do not have optimum code. This sequence will stall the > pipeline for several processor cycles. (The instructions work > correctly, of course, but they take longer than necessary.) The best > technique is to interleave several unrelated instructions between > loading a register and using the new contents of the register. > > This is not natural, sequential thinking for an assembly programmer, > although he could learn to do it. IBM’s recent S/390 compilers contain > logic to produce this sort of optimized code.
re: http://www.garlic.com/~lynn/2011g.html#67 What is the current feeling for MVC loop vs. MVCL? which makes highly optimized code start to look more like old-time horizontal microcoding (high-end pok machines, 3830 controller, etc) ... where the programmer was dealing in concurrent operations with various latencies ... and trying to maximize overlapped operation. -- virtualization experience starting Jan1968, online at home since Mar1970 ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@bama.ua.edu with the message: GET IBM-MAIN INFO Search the archives at http://bama.ua.edu/archives/ibm-main.html
