Todd,

My assembler-writing days started in 1967 when storage was not all that
abundant and economy was paramount*. Concise coding became an ingrained
habit and I was often upset by inefficient macro expansions. Thus I
preferred, for example, to manipulate my register usage to fit what I knew
was needed by the coming macro expansion. Finally, there was really no need
for the macro at all - except to document the SVC call - just like WTO
MF=(E,(1)) for SVC 35 below now I take a look at it. So I guess that's the
diametric opposite of your approach :-)

* I was once on the edge of a project to create some spooling code for DOS -
that's the VSE of today. The target was 4K since it was designed to be able
to fit into a 32K - 64K if you were rich - System 360 Model 30 or 40. One
suggestion from the "review panel" was to use the X'1A' of - I think - the
AR instruction in place of a packed decimal 1 constant.

Chris Mason

----- Original Message ----- 
From: "Todd Burch" <[EMAIL PROTECTED]>
Newsgroups: bit.listserv.ibm-main
To: <IBM-MAIN@BAMA.UA.EDU>
Sent: Tuesday, 21 February, 2006 8:57 PM
Subject: Re: z/Architecture Principles of Operation (SA22-7832-04)


> Point taken, and I have to agree that your sample coding technique will
work
> just fine.
>
> However, I prefer to let the assembler work for me, and to not spend my
time
> manually coding up all the parms and bits and such for macros, so that
when
> they expand all that is left to expand is an SVC.
>
> Todd
>
> ----- Original Message ----- 
> From: "Robert A. Rosenberg" <[EMAIL PROTECTED]>
> Newsgroups: bit.listserv.ibm-main
> To: <IBM-MAIN@BAMA.UA.EDU>
> Sent: Tuesday, February 21, 2006 1:40 PM
> Subject: Re: z/Architecture Principles of Operation (SA22-7832-04)
>
>
> > At 11:51 -0600 on 02/21/2006, Todd Burch wrote about Re:
> > z/Architecture Principles of Operation (SA22-7832-04):
> >
> > >Certainly I can do that.  And, when I do that, I have absolutely no
need
> for
> > >the LDF instructions.
> > >
> > >The purpose of the Long Displacement Facility is to provide relief for
> base
> > >register constraint.  Coding a "LAY R1" to get around a macro
expansion,
> and
> > >taking up a base register to do that, doesn't buy me diddly squat in
> terms
> > >of "base register relief".
> >
> > R1 IS the register that is loaded by the MF=(E,LIST) parm. Thus
> > loading it via a LAY and coding MF=(E,(1)) tells the Macro to not
> > generate the LA 1,List (since R1 has already been loaded). There is
> > no EXTRA register used. Here are the expansions for your review.
> >
> > 000000                00000 00014     1 TESTMF   CSECT
> >                   R:C  00000           2          USING *,12
> >                                        3          WTO   MF=(E,LIST)
> > 000000 4110 C010            00010     7+         LA    1,LIST
> > 000004 0A23                           8+         SVC   35
> > 000006 E310 C010 0071       00010     9          LAY   1,LIST
> >                                       10          WTO   MF=(E,(1))
> > 00000C 0A23                          14+         SVC   35
> > 000010                               15 LIST     DS    F
> >                                       16          END

----------------------------------------------------------------------
For IBM-MAIN subscribe / signoff / archive access instructions,
send email to [EMAIL PROTECTED] with the message: GET IBM-MAIN INFO
Search the archives at http://bama.ua.edu/archives/ibm-main.html

Reply via email to