(snip on instruction fetch vs. execution exceptions) > one of the reasons that 360/67 had an 8-entry associative array (dlat, > tlb, etc) ... was the worse case for "EXECXUTE" of SS instructions > required eight different page addresses.
> "EX" (execute) of another instruction > 2 pages - instruction start and end (crossing page boundary) > target (SS) instruction > 2 pages - instruction start and end (crossing page boundary) > 2 pages - operand1 start and end (crossing page boundary) > 2 pages - operand2 start and end (crossing page boundary) I believe it is something like 53 for VAX. First, page tables are paged (in a different address space, but still using TLB entries), and there are instructions up to six addresses, any and all of which could cross a page boundary. -- glen ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [EMAIL PROTECTED] with the message: GET IBM-MAIN INFO Search the archives at http://bama.ua.edu/archives/ibm-main.html
