-----Original Message-----
From: IBM Mainframe Discussion List [mailto:[EMAIL PROTECTED] On
Behalf Of Ted MacNEIL
Sent: Friday, July 20, 2007 5:59 PM
To: IBM-MAIN@BAMA.UA.EDU
Subject: Re: PSI MIPS (was: Links to decent 'why the mainframe thrives'
article)

>A dual core CPUs actually cause themselves a bottleneck if they only 
>have ONE bus to communicate to/with the outside world. This becomes 
>another design issue that while producing apparent processor speed has 
>to balance out against the ability of the bus (or buses) to handle data

>flow (which gives effective processor speed)

According to somebody I know from IBM Canada's Lab, all mainframe chips
are dual core, but better.
They don't only duplicate the core, but all connections to the world
outside the chip.
Including buses.

I guess they learned after AP's in the late 1970's.
<SNIP>

Oh yeah. Between AP [AP Short], AP Long (kinda Dyadic Processor vs. Dual
Processor, as I recall) that got us to MP, a few lessons were learned.
And if I remember correctly, Amdahl (before my time there) had started
what became XA I/O with MDF (Multiple Domain Feature) which answered
even more problems in this area.

Oh, and before I forget it, PR/SM was IBM's answer to MDF, not vice
versa. I think IBM was actually the second paying customer for MDF.

Later,
Steve Thompson

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