The following message is a courtesy copy of an article
that has been posted to bit.listserv.ibm-main,alt.folklore.computers as well.

[EMAIL PROTECTED] (David Logan) writes:
> While all of that is interesting, and useful in its own right, none of that
> matters when a you want to perform a simple atomic "test and set" of a the
> posted bit in an ECB. Both instructions are atomic for this purpose.
>
> You're not going to have any threading problems when using either
> instruction to check/set the bit in an ECB. The only reason to stay away
> from TS when posting is if you also want to update the completion code.
>
> And the atomic nature only matters when setting the posted bit. For the task
> preparing to wait, since it's only a check of the posted bit, you perform a
> TM and then call WAIT if the posted bit hasn't been set by the time of the
> TM.

re:
http://www.garlic.com/~lynn/2008b.html#50 How does ATTACH pass address of ECB 
to child?
http://www.garlic.com/~lynn/2008b.html#50 How does ATTACH pass address of ECB 
to child?

aka ... the ECB is defined as "testing" both bits zero and one ... where
atomic test&set instruction only tests bit zero.

wait semantics defines that it tests that ECB isn't already being waited
on (bit zero set to zero) and also tests that the ECB isn't already
posted (bit one set to zero).

using test&set instruction will correctly handle an ECB that isn't
already being waited on ... but will incorrectly handle an ECB that has
already been posted (since test&set instruction *ONLY* tests bit zero
before replacing the whole byte with ones).

the original operating system convention would always call the
supervisor ... so it was non-interruptable when the ECB field was being
updated ... and used test&set in multiprocessing configuration to
serialize execution on the different processors.

moving to multiprogramming/multithreaded code w/o code serialization
locks and code enabled for interrupts ... required atomic updates of the
field ... based on update semantics following the rules for both bits 0
(wait) and one (post) ... not just a single bit ... aka wait processing
honors ECB that is already being waited on ... bit 0, and/or has already
been posted ... bit 1. test&set can only recognize an ECB that is
already being waited on ... but won't recognize an ECB that has already
been posted ... before it obliterates all the bits in the byte setting
them all to one.

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