Hi
I just want to get a feeling about the speed , if I change an
unconditional modulo i.e DL (divide logical) instruction
to a logic before call the DL .
John McKown wrote:
On Mon, 1 Dec 2008 17:39:49 +0100, Miklos Szigetvari
<[EMAIL PROTECTED]> wrote:
Hi
Long long time ago there has been this CPU time/instruction tables.
Something like this for a z9 ?
--
Miklos Szigetvari
No. IBM not longer publishes such information as it is misleading. There are
simply too many things which are done which make the data non repeatable.
Even simple things such as branches. The branch prediction logic in modern
systems makes that non deterministic. Today, it is generally felt that it is
more important to write code that is reliable, understandable, and
maintainable than squeezing out the last microsecond of performance (e.g. SR
vs SLR vs XR to clear a register).
--
John
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Miklos Szigetvari
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