No, my concern is that the instructions do signed compares. That was allegedly one of the reasons for A31 rather than A32.
-- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 ________________________________________ From: IBM Mainframe Discussion List <IBM-MAIN@LISTSERV.UA.EDU> on behalf of Paul Gilmartin <0000000433f07816-dmarc-requ...@listserv.ua.edu> Sent: Sunday, October 24, 2021 1:46 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: Blue sky - BXHG/BXLEG on BIG machines On Sun, 24 Oct 2021 17:30:58 +0000, Seymour J Metz wrote: >Currently no foreseeable z hardware or software supports full 64-bit >addresses. Has there been any discussion of BXHG and BXLEG for addresses >greater than 8 EiB? > I believe the BX* are RS instructions so they should properly generate 64-bit addresses from D2(B2) in AMODE 64. Is your concern not with addresses but with the lack of Grande R1 and R3 operands? -- gil ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
