To make my point more clear:
I guess that the FORCEONE code section is planned to
FORCE the bit identified by the input parameters to ONE - that's
what the name says.
But what it really does: it puts a one bit in the correct position for
the relevant target bit and issues an XI instruction on this target bit.
So:
the bit there is INVERTED, not FORCED to ONE.
Could it be that you examine this code section, because you observed
some misbehaving of this code section?
Well: here is the explanation. The coder mixed up XI and OI.
Kind regards
Bernd
Am 04.02.2014 20:38, schrieb Bernd Oppolzer:
I would like to add that the name of the code section and the comment
both are misleading, IMO.
The name of the code section is FORCEONE. If the bit really is forced
to one, the instruction executed should be OI, not XI.
And the comment says that a TM will be executed, but there is no TM.
I have the impression that this code section has been copied several
times; the instruction that is executed has been changed, but the
comments stayed the same. FORCEONE will only be OK, if the target
bit was zero before, otherwise it will change from one to zero, which
is not what the name FORCEONE makes us believe.
Kind regards
Bernd
Am 04.02.2014 20:27, schrieb Bernd Oppolzer:
The TR translates a bit position in the range 0 to 7
to the appropriate bit mask, that is
0 is translated to B'10000000'
1 to B'01000000'
2 to B'00100000'
3 to B'00010000'
and so on
So the XI inverts the bit that is specified by those two parameters
on entry to the procedure:
ZAP BYTE,T@SAVE(7) QUOTIENT IS BYTE DISPLACEMENT.
* 00000910
ZAP BIT,T@SAVE+7(1) REMAINDER IS BIT DISPLACEMENT.
* 00000920
Kind regards
Bernd
Am 04.02.2014 18:22, schrieb Ron Thomas:
Ok Thanks .so what would be o/p of this statement "TR BIT,TR@TAB
" here ?
Thanks,
Ron T
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