esst...@juno.com (esst...@juno.com) writes: > "supplying the entire OS on a chip" > > I heard a similar statement delivered by the Late Great Bob Yelevich > in the early 1990s. He suggested that CICS would be delivered on a > Board, or possibly a component/domain would be delivered on a board. > . > . > As a contractor I have experienced the neglect in Installations, when > Qualified Systems Programmers are not employed. I was in one > installation where I inherited well over one hundred outstanding > issues, Abends, Storage Violations, back level maintenance.
re: http://www.garlic.com/~lynn/2017g.html#23 Eliminating the systems programmer was Re: IBM cuts contractor billing by 15 percent (our else) early 1975, I got sucked into helping get system enhancements out ... as failing http://www.garlic.com/~lynn/submain.html#futuresys one was ECPS microcode assist for new 138/148 .... low & mid-range machines implemented with vertical microcode (somewhat like Hercules mainframe emulator) ... with a avg ratio of 10:1 native instructions per 370 instruction. was to select 6kbytes of most frequently executed operating system code for moving into native ... for a 10:1 speedup. (which turned out to be 79.55% of supervisor execution) old post http://www.garlic.com/~lynn/94.html#21 370 ECPS VM microcode assist I also got sucked into designing 5-way SMP for 370/125. 115/125 had nine position memory bus for microprocessors. 115 had all microprocessors the same just with different microcode loads for 370 processor, controllers, etc. 125 was identical except the 370 processor was 50% faster than the other processors. I dropped multiprocessor dispatching/scheduling for problem state and supervisor state into microcode ... with queued interface that put tasks on the queue and pulled stuff off the queue. Lots of multiprocessor operation was transparent to the actual software (all hidden in microcode). I also did queued microcode interface for all I/O ... putting stuff on the queue and pulling stuff off the queue. The 370/125 multiprocessor was never announced or shipped (in part becuase the 138/148 people complained it was overlapping their market, I was in some escalation meetings where I had to argue both sides). http://www.garlic.com/~lynn/submain.html#bounce Early 80s, I was at bi-annual ACM SIGOPS meetings where the intel i432 people gave a talk on what they were doing ... which included a lot of higher level function ... like I had done for 125 (lot of multiprocessor and I/O operation was queued interface and transparent to "software"). They found out that their major problem was that all these advanced functions was manufactured into the chip silicon ... and any fixes required spinning new silicon and replacing all the chips. as an aside ... other stuff going into i432 was similar stuff to some stuff that went into IBM S/38 ... which has been characterized as after FS failure, some of the people retreated to Rochester and did a much simplified FS flavor as S/38 (but again in microcode, not the raw silicon). I've periodically pointed out that in the S/38 market the trade-off between simplified operation and lack of sclability ... came down on the side of simplified operation (in the high-end market, one of the things that put the nails in FS coffin was showing 370/195 applications redone for FS, running on fastest possible FS hardware, would have throughput of 370/145, about 30times slowdown). past posts mentioning I432 http://www.garlic.com/~lynn/2000e.html#6 Ridiculous http://www.garlic.com/~lynn/2000f.html#48 Famous Machines and Software that didn't http://www.garlic.com/~lynn/2001g.html#36 What was object oriented in iAPX432? http://www.garlic.com/~lynn/2002d.html#27 iAPX432 today? http://www.garlic.com/~lynn/2002l.html#19 Computer Architectures http://www.garlic.com/~lynn/2002o.html#5 Anyone here ever use the iAPX432 ? http://www.garlic.com/~lynn/2003e.html#54 Reviving Multics http://www.garlic.com/~lynn/2003m.html#23 Intel iAPX 432 http://www.garlic.com/~lynn/2003m.html#24 Intel iAPX 432 http://www.garlic.com/~lynn/2003m.html#47 Intel 860 and 960, was iAPX 432 http://www.garlic.com/~lynn/2004e.html#52 Infiniband - practicalities for small clusters http://www.garlic.com/~lynn/2004q.html#60 Will multicore CPUs have identical cores? http://www.garlic.com/~lynn/2004q.html#64 Will multicore CPUs have identical cores? http://www.garlic.com/~lynn/2004q.html#73 Athlon cache question http://www.garlic.com/~lynn/2005d.html#64 Misuse of word "microcode" http://www.garlic.com/~lynn/2005k.html#46 Performance and Capacity Planning http://www.garlic.com/~lynn/2005q.html#31 Intel strikes back with a parallel x86 design http://www.garlic.com/~lynn/2006c.html#47 IBM 610 workstation computer http://www.garlic.com/~lynn/2006n.html#42 Why is zSeries so CPU poor? http://www.garlic.com/~lynn/2006n.html#44 Any resources on VLIW? http://www.garlic.com/~lynn/2006t.html#7 32 or even 64 registers for x86-64? http://www.garlic.com/~lynn/2007s.html#36 Oracle Introduces Oracle VM As It Leaps Into Virtualization http://www.garlic.com/~lynn/2008d.html#54 Throwaway cores http://www.garlic.com/~lynn/2008e.html#32 CPU time differences for the same job http://www.garlic.com/~lynn/2008k.html#22 CLIs and GUIs http://www.garlic.com/~lynn/2009d.html#52 Lack of bit field instructions in x86 instruction set because of patents ? http://www.garlic.com/~lynn/2009o.html#18 Microprocessors with Definable MIcrocode http://www.garlic.com/~lynn/2009o.html#46 U.S. begins inquiry of IBM in mainframe market http://www.garlic.com/~lynn/2009q.html#74 Now is time for banks to replace core system according to Accenture http://www.garlic.com/~lynn/2010g.html#1 IA64 http://www.garlic.com/~lynn/2010g.html#45 IA64 http://www.garlic.com/~lynn/2010h.html#8 Far and near pointers on the 80286 and later http://www.garlic.com/~lynn/2010h.html#40 Faster image rotation http://www.garlic.com/~lynn/2010j.html#22 Personal use z/OS machines was Re: Multiprise 3k for personal Use? http://www.garlic.com/~lynn/2011c.html#7 RISCversus CISC http://www.garlic.com/~lynn/2011c.html#91 If IBM Hadn't Bet the Company http://www.garlic.com/~lynn/2011k.html#79 Selectric Typewriter--50th Anniversary http://www.garlic.com/~lynn/2011l.html#15 Selectric Typewriter--50th Anniversary http://www.garlic.com/~lynn/2011l.html#42 i432 on Bitsavers? http://www.garlic.com/~lynn/2012k.html#14 International Business Marionette http://www.garlic.com/~lynn/2012k.html#57 1132 printer history http://www.garlic.com/~lynn/2012n.html#40 history of Programming language and CPU in relation to each other http://www.garlic.com/~lynn/2013f.html#33 Delay between idea and implementation http://www.garlic.com/~lynn/2014k.html#23 1950: Northrop's Digital Differential Analyzer http://www.garlic.com/~lynn/2014m.html#107 IBM 360/85 vs. 370/165 http://www.garlic.com/~lynn/2016d.html#62 PL/I advertising http://www.garlic.com/~lynn/2016d.html#63 PL/I advertising http://www.garlic.com/~lynn/2016e.html#115 IBM History http://www.garlic.com/~lynn/2016f.html#38 British socialism / anti-trust http://www.garlic.com/~lynn/2017e.html#61 Typesetting -- virtualization experience starting Jan1968, online at home since Mar1970 ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
