As was mentioned in one of the threads, you need to follow the RB chain (TCBRBP points to the newest).
The STIMER exit itself is running as an IRB. When any RB ends normally, the registers associated with the previously running RB (some saved in the current RB, some in the RB's XSB) and the PSW associated with the previously running RB (saved in that previous RB/XSB) is used to give control (thus has the next instruction address). Peter Relson z/OS Core Technology Design ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
