sme...@gmu.edu (Seymour J Metz) writes: > The 370/168 had UP models ranging from 1 MiB to 8 MiB. Double that for MP. > > The Amdahl 470V/6 was available in 1 MiB through 8 MiB. > > Maybe so, but Amdahl started shipping the 470V/6 in 1975 with 4 MB of > memory standard, and I'm pretty sure that the 370 model 168 also had 4 > MB in that time frame. I'm pretty sure that either of those processors > would outperform a 360/75 by a considerable margin. According to > Wikipedia, the model 75 first shipped in 1965
370/165 had 2mic memory ... typically 1mbyte. It was part of explanation/justification for making all 370s virtual memory ... i.e. MVT real storage management was so bad that region sizes had to be four times larger than actually used ... getting four concurrent regions on typical 1mbyte memory machine. Going to virtual memory (very much like running in CP67 16mbyte virtual machine) could get four times as many regions with little or no paging ... on same 370/165 one mbyte machine. Old reference about being asked to try and track down reason for the decision to move to virtual memory for all 370s. http://www.garlic.com/~lynn/2011d.html#73 part of upgrade from 165 to 168 was moving to new memory technology ... about same access time as 370/145, around 400ns (but 165&168 also had 80ns cache) https://en.wikipedia.org/wiki/IBM_System/370_Model_168 Newer technology than that of the 370/165, which had been introduced 2 years prior, used "monolithic, instead of magnetic core" memory,[5] resulting in a system which was faster and physically smaller than a Model 165.[5]:pp.3 ... snip ... 168-1 to 168-3 doubled cache size from 16kbytes to 32kbytes. Had one vm370/vs1 customer that upgraded from 168-1 to 168-3 (double cache) and found it running much slower than 168-1. Issue was that 168-3 ran 2k page option with only half the cache, and everytime (vm370) switched between 4k pages and 2k pages, the cache was flushed (w/o all the cache flushing, 2k pages would have run same as 168-1). I had worked with some of the 165/168 engineers and they said that the other difference was that they optimized the microcode reducing avg. of 2.1cycles per 370 instruction for 165 to 1.6cycles per instruction for 168. 168-3, optimized m'code, 400ns memory and 32kbyte cache was 3-3.5MIPS ... some 3times that of 360/75. -- virtualization experience starting Jan1968, online at home since Mar1970 ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
