Argh.  A "LOAD LOGICAL 24 BITS" would actually still be useful. Of course,
we need the other 24 bits :-).

LAN (and LAA) are weird instructions.  The and part (AND or OR) (does this
read like "Alice in Wonderland" yet?) is performed on the *second* operand
-- the field in storage.  They have some fairly obvious uses (similar to
CS), but the names seem misleading to me.

As for LZRF... maybe somebody finally got an Easter egg into the
architecture.  You'd think that a L / NILL sequence wouldn't likely be the
worst bottleneck they needed to solve last year.

sas



On Wed, Jul 24, 2019 at 6:00 PM zMan <zedgarhoo...@gmail.com> wrote:

> Obviously it's for little-Endian 24-bit addressing mode!
>
> On Wed, Jul 24, 2019 at 3:18 PM Tony Harminc <t...@harminc.net> wrote:
>
> > On Wed, 24 Jul 2019 at 08:35, Vernooij, Kees (ITOP NM) - KLM <
> > kees.verno...@klm.com> wrote:
> >
> > > I cannot answer your question, it is probably depending on how the
> > > hardware works on different machines.
> > >
> > > Another question: what is the purpose of this instruction?
> >
> >
> > I think that's what the OP was asking.
> >
> > Is it executed that often that it is worthwhile to make an instruction to
> > > replace 2 instructions (Load+AND, MOVE+AND) or is there another reason?
> > >
> >
> > In fact there is an earlier Load and AND instruction LAN/LANG that can do
> > just the same thing in one instruction, though it also sets the condition
> > code based on the result, and requires full or double word alignment,
> which
> > LZRF/LZRG do not.
> >
> > Paging Dan Greiner...
> >
> > Tony H.
> >
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>
>
> --
> zMan -- "I've got a mainframe and I'm not afraid to use it"
>
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-- 
sas

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