On Thu, 11 May 2006 11:08:56 -0700, glen herrmannsfeldt <[EMAIL PROTECTED] .edu> wrote:
>Marten Kemp <[EMAIL PROTECTED]> writes: >> The recent thread about virtual memory sparked a (kind of) >> idle question: why did the implementation in the S/370 >> have a two-level scheme (segment and page)? My original >> thought was that it facilitated definition of discontiguous >> parts of an address space. > >Well, mostly it is because smaller systems don't have enough >real memory to hold a one level page table. > >The segment/page system allows page tables to be paged out, >with the invalid bit in the segment table. > >VAX uses a two level system where page tables are paged. >There is kernel space, which isn't paged and holds the first >level tables referencing pagable second level tables. > >z/Archtecture has three levels. > >-- glen >======================== ========================= ========== ============== Actually, z/Architecture has 5 levels. So far, the existed hardware only uses 3 of them.
