On Thu, 6 May 2004 10:19:11 -0400, Alan Altmark <[EMAIL PROTECTED]> wrote:
>I need to point out that h/w assist for SIE is *never* lost, no matter h ow >many levels deep you are. VSIE is one of the most fascinating parts of >CP. When an n-th level guest issues a SIE instruction, there is no >interpretation by CP. Instead, each successively lower level of CP will >get control and "constrict" the execution environment until a level of C P >is reached that can use real h/w SIE. In effect, the SIEs "pancake" do wn >until h/w is available. When the SIE breaks, control percolates up to t he >original level of CP to handle. > >It's kind of neat to think of a first-level SIE being issued specificall y >to run a 5th level guest! Sure, it doesn't get much execution time, but >the h/w is still there handling address translation, privops, etc. > >What *is* lost to 2nd level and higher is the ECKD I/O assist. > >Alan Alan, Sorry for digging up this old post, but I have a few questions regarding this I'd like clarification on. For purposes of maximizing performance of a 2nd level (or higher) guest one would obviously like to minimize SIE breaks. I would appreciate your comments and confirmations/corrections on these: 1) SIE breaks are going to happen for dedicated devices because of the loss of I/O assist (requiring the higher level CP to convert the virtual addresses to real addresses). 2) Dedicated CPUs will reduce the number of SIE breaks (by removing the higher level CP's dispatching timers for the guest CPU). True? 3) Reducing paging for the guest in the higher level CP (eg. SET RESERVED ) can help minimize SIE breaks (by reducing progam interrupts caused by DAT not finding guest memory addresses resident in host memory). 4) If said guest is z/OS, several of the conditions which trigger SIE breaks generally don't happen frequently enough to worry about (commands from the virtual console, IUCV/APPC instruction 0xB2F0, Diagnose instructions). 5) Are there any other things (other than moving it to an LPAR) that can be done to minimize SIE breaks for 2nd level z/OS and z/VM systems? Brian Nielsen
