'Ceptin that we're sharing all of the IFLs across several LPARs... Leland
On Wed, Feb 17, 2010 at 5:30 PM, Schuh, Richard <rsc...@visa.com> wrote: > If all LPARs using the same type of processor were running with dedicated > processors, I would not be surprised to see the one varied off to be put in > some kind of disabled state. > > > Regards, > Richard Schuh > > > > > ------------------------------ > *From:* The IBM z/VM Operating System [mailto:ib...@listserv.uark.edu] *On > Behalf Of *Leland Lucius > *Sent:* Wednesday, February 17, 2010 3:12 PM > *To:* IBMVM@LISTSERV.UARK.EDU > *Subject:* Re: What does this wait state PSW mean? > > :-D Same thing my mama used to tell me some 30 years ago. :-) > > Leland > > On Wed, Feb 17, 2010 at 4:44 PM, David Boyes <dbo...@sinenomine.net>wrote: > >> “Don’t Do That”. >> >> On 2/17/10 5:20 PM, "Leland Lucius" <lluc...@homerow.net> wrote: >> >> After varying off a processor, we received a "disabled wait" PSW of: >> >> 0bad0bad0bad0bad0bad0bad0bad0b >> ad >> >> Systems still active and we wouldn't have even known about it, but someone >> happened to be digging around in the HMC and noticed. >> >> >
