Display engine on Sandybridge is not coherent with LLC, so
try to always bind display buffer as uncached on Sandybridge.
This fixed screen artifacts seen by using blit engine on Sandybridge.
Cc: stable team <sta...@kernel.org>
Signed-off-by: Zhenyu Wang <zhen...@linux.intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_display.c | 8 ++++++++
2 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3a98bea..5200ee3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -34,6 +34,7 @@
#include "intel_bios.h"
#include "intel_ringbuffer.h"
#include <linux/io-mapping.h>
+#include <linux/intel-gtt.h>
/* General customization:
*/
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 9792285..46d724f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1579,6 +1579,14 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
obj = intel_fb->obj;
obj_priv = to_intel_bo(obj);
+ /*
+ * Set uncacheable for scan-out buffer on Sandybridge.
+ * Display engine is non-coherent with LLC, and read from
+ * main memory only. This ensures data is coherent with display.
+ */
+ if (IS_GEN6(dev))
+ obj_priv->agp_type = AGP_USER_UNCACHED_MEMORY;
+
mutex_lock(&dev->struct_mutex);
ret = intel_pin_and_fence_fb_obj(dev, obj);
if (ret != 0) {
--
1.7.1
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