Whenever we finish reading an object through a fence, for safety we
clear any GPU read domain and so invalidate any TLBs associated with
the fenced region upon its next use.

Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_gem.c            |    2 ++
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |    5 ++---
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index ef84c13..5201f82 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2456,6 +2456,8 @@ i915_gem_object_flush_fence(struct drm_i915_gem_object 
*obj,
                                return ret;
                }
 
+                /* Invalidate the GPU TLBs for any future reads */
+               obj->base.read_domains &= ~I915_GEM_GPU_DOMAINS;
                obj->fenced_gpu_access = false;
        }
 
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 7ff7f93..8367fc9 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -172,9 +172,8 @@ i915_gem_object_set_to_gpu_domain(struct 
drm_i915_gem_object *obj,
         * write domain
         */
        if (obj->base.write_domain &&
-           (((obj->base.write_domain != obj->base.pending_read_domains ||
-              obj->ring != ring)) ||
-            (obj->fenced_gpu_access && !obj->pending_fenced_gpu_access))) {
+           (obj->base.write_domain != obj->base.pending_read_domains ||
+            obj->ring != ring)) {
                flush_domains |= obj->base.write_domain;
                invalidate_domains |=
                        obj->base.pending_read_domains & 
~obj->base.write_domain;
-- 
1.7.2.3

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to