On Thu, Jan 19, 2012 at 10:50:05AM -0800, Eric Anholt wrote: > We have always been using the wrong bit -- it's bit 12. However, the > bit also doesn't do anything -- hardware has always accepted the > MI_FLUSH command even when it was specced not to. > > Given that there is only one MI_FLUSH emitted in all of the driver > stack on gen6+ (in i965_video.c of the 2d driver, and it should be > using other code to do its flush instead), just remove the MI_FLUSH > enable instead of trying to fix it. > > Signed-off-by: Eric Anholt <e...@anholt.net>
The other thing is that I've just tested the bit11 | bit12 patch from Ben on my ivb, and it resulted in a nice system death, like setting bit12 on snb. So whoever wrote that piece of bspec didn't talk with whomever implemented it ... Reviewed-by: Daniel Vetter <daniel.vet...@ffwll.ch> -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
