On Wed, Nov 02, 2016 at 09:43:54AM +0000, Chris Wilson wrote:
> commit bc0629a76726 ("drm/i915: Track pages pinned due to swizzling
> quirk") fixed one problem, but revealed a whole lot more. The root cause
> of the pin count mismatch for the swizzle quirk (for L-shaped memory on
> gen3/4) was that we were incrementing the pages_pin_count upon getting
> the backing pages but then overwriting the pages_pin_count to set it to
> 1 afterwards. With a little bit of adjustment to satisfy the GEM_BUG_ON
> sanitychecks, the fix is to replace the explicit atomic_set with an
> atomic_inc.
> 
> Fixes: 1233e2db199d ("drm/i915: Move object backing storage manipulation")
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com>

Ping?

> ---
>  drivers/gpu/drm/i915/i915_gem.c        | 40 
> ++++++++++++++++++----------------
>  drivers/gpu/drm/i915/i915_gem_gtt.c    |  1 +
>  drivers/gpu/drm/i915/i915_gem_tiling.c |  1 +
>  3 files changed, 23 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 993fb90da104..5fe7562aefbd 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2386,12 +2386,6 @@ i915_gem_object_get_pages_gtt(struct 
> drm_i915_gem_object *obj)
>       if (i915_gem_object_needs_bit17_swizzle(obj))
>               i915_gem_object_do_bit_17_swizzle(obj, st);
>  
> -     if (i915_gem_object_is_tiled(obj) &&
> -         dev_priv->quirks & QUIRK_PIN_SWIZZLED_PAGES) {
> -             __i915_gem_object_pin_pages(obj);
> -             obj->mm.quirked = true;
> -     }
> -
>       return st;
>  
>  err_pages:
> @@ -2424,6 +2418,13 @@ void __i915_gem_object_set_pages(struct 
> drm_i915_gem_object *obj,
>       obj->mm.get_page.sg_idx = 0;
>  
>       obj->mm.pages = pages;
> +
> +     if (i915_gem_object_is_tiled(obj) &&
> +         to_i915(obj->base.dev)->quirks & QUIRK_PIN_SWIZZLED_PAGES) {
> +             GEM_BUG_ON(obj->mm.quirked);
> +             __i915_gem_object_pin_pages(obj);
> +             obj->mm.quirked = true;
> +     }
>  }
>  
>  static int ____i915_gem_object_get_pages(struct drm_i915_gem_object *obj)
> @@ -2458,17 +2459,16 @@ int __i915_gem_object_get_pages(struct 
> drm_i915_gem_object *obj)
>       if (err)
>               return err;
>  
> -     if (likely(obj->mm.pages)) {
> -             __i915_gem_object_pin_pages(obj);
> -             goto unlock;
> -     }
> -
> -     GEM_BUG_ON(i915_gem_object_has_pinned_pages(obj));
> +     if (unlikely(!obj->mm.pages)) {
> +             GEM_BUG_ON(i915_gem_object_has_pinned_pages(obj));
> +             err = ____i915_gem_object_get_pages(obj);
> +             if (err)
> +                     goto unlock;
>  
> -     err = ____i915_gem_object_get_pages(obj);
> -     if (!err)
> -             atomic_set_release(&obj->mm.pages_pin_count, 1);
> +             smp_mb__before_atomic();
> +     }
>  
> +     __i915_gem_object_pin_pages(obj);
>  unlock:
>       mutex_unlock(&obj->mm.lock);
>       return err;
> @@ -2542,8 +2542,8 @@ void *i915_gem_object_pin_map(struct 
> drm_i915_gem_object *obj,
>               if (ret)
>                       goto err_unlock;
>  
> -             GEM_BUG_ON(atomic_read(&obj->mm.pages_pin_count));
> -             atomic_set_release(&obj->mm.pages_pin_count, 1);
> +             smp_mb__before_atomic();
> +             __i915_gem_object_pin_pages(obj);
>               pinned = false;
>       }
>       GEM_BUG_ON(!obj->mm.pages);
> @@ -2578,7 +2578,7 @@ void *i915_gem_object_pin_map(struct 
> drm_i915_gem_object *obj,
>       return ptr;
>  
>  err_unpin:
> -     atomic_dec(&obj->mm.pages_pin_count);
> +     __i915_gem_object_unpin_pages(obj);
>  err_unlock:
>       ptr = ERR_PTR(ret);
>       goto out_unlock;
> @@ -2996,7 +2996,7 @@ int i915_vma_unbind(struct i915_vma *vma)
>               goto destroy;
>  
>       GEM_BUG_ON(obj->bind_count == 0);
> -     GEM_BUG_ON(!obj->mm.pages);
> +     GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));
>  
>       if (i915_vma_is_map_and_fenceable(vma)) {
>               /* release the fence reg _after_ flushing */
> @@ -3230,6 +3230,7 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64 
> alignment, u64 flags)
>       list_move_tail(&obj->global_list, &dev_priv->mm.bound_list);
>       list_move_tail(&vma->vm_link, &vma->vm->inactive_list);
>       obj->bind_count++;
> +     GEM_BUG_ON(atomic_read(&obj->mm.pages_pin_count) < obj->bind_count);
>  
>       return 0;
>  
> @@ -4282,6 +4283,7 @@ i915_gem_madvise_ioctl(struct drm_device *dev, void 
> *data,
>                       obj->mm.quirked = false;
>               }
>               if (args->madv == I915_MADV_WILLNEED) {
> +                     GEM_BUG_ON(obj->mm.quirked);
>                       __i915_gem_object_pin_pages(obj);
>                       obj->mm.quirked = true;
>               }
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
> b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index dfc40f16f149..4dc1a463ef4c 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -3707,6 +3707,7 @@ i915_get_ggtt_vma_pages(struct i915_vma *vma)
>  {
>       int ret = 0;
>  
> +     GEM_BUG_ON(!i915_gem_object_has_pinned_pages(vma->obj));
>       if (vma->pages)
>               return 0;
>  
> diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c 
> b/drivers/gpu/drm/i915/i915_gem_tiling.c
> index 1577e7810cd6..251d51b01174 100644
> --- a/drivers/gpu/drm/i915/i915_gem_tiling.c
> +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
> @@ -269,6 +269,7 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
>                                       obj->mm.quirked = false;
>                               }
>                               if (!i915_gem_object_is_tiled(obj)) {
> +                                     GEM_BUG_ON(!obj->mm.quirked);
>                                       __i915_gem_object_pin_pages(obj);
>                                       obj->mm.quirked = true;
>                               }
> -- 
> 2.10.2
> 

-- 
Chris Wilson, Intel Open Source Technology Centre
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