On Mon, Dec 12, 2016 at 02:57:44PM +0800, Wang Elaine wrote: > From: Elaine Wang <[email protected]> > > Some platforms don't have display. To avoid accessing the > non-existent registers, check HAS_PCH_NOP before invoking > display IRQ install or reset function. > > Cc: Chris Wilson <[email protected]> > Cc: Joonas Lahtinen <[email protected]> > Signed-off-by: Elaine Wang <[email protected]> > --- > drivers/gpu/drm/i915/i915_irq.c | 10 +++++++--- > 1 file changed, 7 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index 0b119b9..369a038 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -2990,8 +2990,10 @@ static void gen8_irq_reset(struct drm_device *dev) > POWER_DOMAIN_PIPE(pipe))) > GEN8_IRQ_RESET_NDX(DE_PIPE, pipe); > > - GEN5_IRQ_RESET(GEN8_DE_PORT_); > - GEN5_IRQ_RESET(GEN8_DE_MISC_); > + if (!HAS_PCH_NOP(dev_priv)) { > + GEN5_IRQ_RESET(GEN8_DE_PORT_); > + GEN5_IRQ_RESET(GEN8_DE_MISC_); > + }
Hmm. These are north side registers so looking at PCH_NOP feels questionable. > GEN5_IRQ_RESET(GEN8_PCU_); > > if (HAS_PCH_SPLIT(dev_priv)) > @@ -3414,7 +3416,9 @@ static int gen8_irq_postinstall(struct drm_device *dev) > ibx_irq_pre_postinstall(dev); > > gen8_gt_irq_postinstall(dev_priv); > - gen8_de_irq_postinstall(dev_priv); > + > + if (!HAS_PCH_NOP(dev_priv)) > + gen8_de_irq_postinstall(dev_priv); > > if (HAS_PCH_SPLIT(dev_priv)) > ibx_irq_postinstall(dev); > -- > 1.9.1 -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
