On Wed, Feb 22, 2017 at 06:54:22PM +0200, Mika Kuoppala wrote:
> Don't mark pdps clear if never do the necessary actions
> with the hardware to make them clear.
> 
> Signed-off-by: Mika Kuoppala <mika.kuopp...@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_lrc.c | 17 ++++++++---------
>  1 file changed, 8 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c 
> b/drivers/gpu/drm/i915/intel_lrc.c
> index 39329d4..5dc2bbb 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1321,7 +1321,7 @@ static int gen8_emit_bb_start(struct 
> drm_i915_gem_request *req,
>                             u64 offset, u32 len,
>                             unsigned int dispatch_flags)
>  {
> -     bool ppgtt = !(dispatch_flags & I915_DISPATCH_SECURE);
> +     const bool use_ppgtt = !(dispatch_flags & I915_DISPATCH_SECURE);
>       u32 *cs;
>       int ret;
>  
> @@ -1332,13 +1332,12 @@ static int gen8_emit_bb_start(struct 
> drm_i915_gem_request *req,
>        * not idle). PML4 is allocated during ppgtt init so this is
>        * not needed in 48-bit.*/
>       if (req->ctx->ppgtt &&
> -         (intel_engine_flag(req->engine) & req->ctx->ppgtt->pd_dirty_rings)) 
> {
> -             if (!i915_vm_is_48bit(&req->ctx->ppgtt->base) &&
> -                 !intel_vgpu_active(req->i915)) {
> -                     ret = intel_logical_ring_emit_pdps(req);
> -                     if (ret)
> -                             return ret;
> -             }
> +         (intel_engine_flag(req->engine) & req->ctx->ppgtt->pd_dirty_rings) 
> &&
> +         !i915_vm_is_48bit(&req->ctx->ppgtt->base) &&
> +         !intel_vgpu_active(req->i915)) {
> +             ret = intel_logical_ring_emit_pdps(req);
> +             if (ret)
> +                     return ret;
>  
>               req->ctx->ppgtt->pd_dirty_rings &= 
> ~intel_engine_flag(req->engine);
>       }
> @@ -1348,7 +1347,7 @@ static int gen8_emit_bb_start(struct 
> drm_i915_gem_request *req,
>               return PTR_ERR(cs);
>  
>       /* FIXME(BDW): Address space and security selectors. */
> -     *cs++ = MI_BATCH_BUFFER_START_GEN8 | (ppgtt << 8) | (dispatch_flags &
> +     *cs++ = MI_BATCH_BUFFER_START_GEN8 | (use_ppgtt << 8) | (dispatch_flags 
> &
>               I915_DISPATCH_RS ? MI_BATCH_RESOURCE_STREAMER : 0);

Missed an opportunity here.

        *cs++ = MI_BATCH_BUFFER_START_GEN8 |
                (dispatch_flags & I915_DISPATCH_SECURE) ? 0 : BIT(8) |
                (dispatch_flags & I915_DISPATCH_RS ? MI_BATCH_RESOURCE_STREAMER 
: 0);

-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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