By spec there is no change on force wake registers
for Cannonlake. Let's reuse gen9 one.
v2: Adding missing case for the write part. (Tvrtko)
v3: Rebase on recent tree.
Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com>
---
drivers/gpu/drm/i915/intel_uncore.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uncore.c
b/drivers/gpu/drm/i915/intel_uncore.c
index 6d1ea26..034b728 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -642,7 +642,8 @@ static int fw_range_cmp(u32 offset, const struct
intel_forcewake_range *entry)
{ .start = (s), .end = (e), .domains = (d) }
#define HAS_FWTABLE(dev_priv) \
- (IS_GEN9(dev_priv) || \
+ (IS_GEN10(dev_priv) || \
+ IS_GEN9(dev_priv) || \
IS_CHERRYVIEW(dev_priv) || \
IS_VALLEYVIEW(dev_priv))
@@ -1177,7 +1178,7 @@ static void intel_uncore_fw_domains_init(struct
drm_i915_private *dev_priv)
dev_priv->uncore.fw_clear =
_MASKED_BIT_DISABLE(FORCEWAKE_KERNEL);
}
- if (IS_GEN9(dev_priv)) {
+ if (IS_GEN9(dev_priv) || IS_GEN10(dev_priv)) {
dev_priv->uncore.funcs.force_wake_get = fw_domains_get;
dev_priv->uncore.funcs.force_wake_put = fw_domains_put;
fw_domain_init(dev_priv, FW_DOMAIN_ID_RENDER,
--
1.9.1
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