Chris Wilson <ch...@chris-wilson.co.uk> writes: > The hangcheck runs independently to the main flow of seqno through the > driver. However, we have an odd coupling of the seqno reset that is > unwelcome, and if poked at just the right rate can cause spurious hangs > (e.g. gem_exec_whisper) on an apparently idle engine. > > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> > Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuopp...@intel.com> > --- > drivers/gpu/drm/i915/intel_engine_cs.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c > b/drivers/gpu/drm/i915/intel_engine_cs.c > index 7681d17ce454..f3cb7e931317 100644 > --- a/drivers/gpu/drm/i915/intel_engine_cs.c > +++ b/drivers/gpu/drm/i915/intel_engine_cs.c > @@ -265,6 +265,7 @@ void intel_engine_init_global_seqno(struct > intel_engine_cs *engine, u32 seqno) > struct drm_i915_private *dev_priv = engine->i915; > > GEM_BUG_ON(!intel_engine_is_idle(engine)); > + GEM_BUG_ON(i915_gem_active_isset(&engine->timeline->last_request)); > > /* Our semaphore implementation is strictly monotonic (i.e. we proceed > * so long as the semaphore value in the register/page is greater > @@ -284,9 +285,6 @@ void intel_engine_init_global_seqno(struct > intel_engine_cs *engine, u32 seqno) > intel_write_status_page(engine, I915_GEM_HWS_INDEX, seqno); > clear_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted); > > - GEM_BUG_ON(i915_gem_active_isset(&engine->timeline->last_request)); > - engine->hangcheck.seqno = seqno; > - > /* After manually advancing the seqno, fake the interrupt in case > * there are any waiters for that seqno. > */ > -- > 2.11.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
