Em Sáb, 2017-03-18 às 00:45 +0530, Praveen Paneri escreveu:
> From: Akash Goel <akash.g...@intel.com>
> 
> Signed-off-by: Akash Goel <akash.g...@intel.com>
> Signed-off-by: Praveen Paneri <praveen.pan...@intel.com>
> ---
>  lib/igt_draw.c | 35 +++++++++++++++++++++++++++++++++++
>  1 file changed, 35 insertions(+)
> 
> diff --git a/lib/igt_draw.c b/lib/igt_draw.c
> index fcf8fba..17011d8 100644
> --- a/lib/igt_draw.c
> +++ b/lib/igt_draw.c
> @@ -31,6 +31,7 @@
>  #include "igt_core.h"
>  #include "igt_fb.h"
>  #include "ioctl_wrappers.h"
> +#include "i830_reg.h"
>  
>  /**
>   * SECTION:igt_draw
> @@ -487,6 +488,23 @@ static void draw_rect_blt(int fd, struct
> cmd_data *cmd_data,
>       blt_cmd_tiling = (tiling) ? XY_COLOR_BLT_TILED : 0;
>       pitch = (tiling) ? buf->stride / 4 : buf->stride;
>  
> +     if (tiling == I915_TILING_Y) {
> +             /* To change the tile register, insert an
> MI_FLUSH_DW followed by an MI_LOAD_REGISTER_IMM */
> +             BEGIN_BATCH(4, 0);
> +             OUT_BATCH(MI_FLUSH_DW | 2);
> +             OUT_BATCH(0x0);
> +             OUT_BATCH(0x0);
> +             OUT_BATCH(0x0);
> +             ADVANCE_BATCH();
> +
> +             BEGIN_BATCH(4, 0);
> +             OUT_BATCH(MI_LOAD_REGISTER_IMM);
> +             OUT_BATCH(0x22200); /* BCS_SWCTRL */
> +             OUT_BATCH(((0x3 << 16) | 0x3)); /* enable the Y
> tiling */
> +             OUT_BATCH(MI_NOOP);
> +             ADVANCE_BATCH();
> +     }
> +
>       BEGIN_BATCH(6, 1);
>       OUT_BATCH(XY_COLOR_BLT_CMD_NOLEN | XY_COLOR_BLT_WRITE_ALPHA
> |
>                 XY_COLOR_BLT_WRITE_RGB | blt_cmd_tiling |
> blt_cmd_len);
> @@ -497,6 +515,23 @@ static void draw_rect_blt(int fd, struct
> cmd_data *cmd_data,
>       OUT_BATCH(color);
>       ADVANCE_BATCH();
>  
> +     if (tiling == I915_TILING_Y) {
> +             /* To change the tile register, insert an
> MI_FLUSH_DW followed by an MI_LOAD_REGISTER_IMM */
> +             BEGIN_BATCH(4, 0);
> +             OUT_BATCH(MI_FLUSH_DW | 2);
> +             OUT_BATCH(0x0);
> +             OUT_BATCH(0x0);
> +             OUT_BATCH(0x0);
> +             ADVANCE_BATCH();
> +
> +             BEGIN_BATCH(4, 0);
> +             OUT_BATCH(MI_LOAD_REGISTER_IMM);
> +             OUT_BATCH(0x22200); /* BCS_SWCTRL */
> +             OUT_BATCH((0x3 << 16)); /* Reset back to X-Tiling
> (default) */
> +             OUT_BATCH(MI_NOOP);
> +             ADVANCE_BATCH();
> +     }

These are two almost identical copies of the same code. Please extract
them to a function that takes the tiling as the argument.

> +
>       intel_batchbuffer_flush(batch);
>       intel_batchbuffer_free(batch);
>  }
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