This will make future patches simpler.
Signed-off-by: Michal Wajdeczko <michal.wajdec...@intel.com>
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Oscar Mateo <oscar.ma...@intel.com>
---
drivers/gpu/drm/i915/intel_lrc.c | 21 +++++++++++++--------
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 9a1192d..7782619 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1142,9 +1142,20 @@ static int intel_init_workaround_bb(struct
intel_engine_cs *engine)
return ret;
}
-static int gen8_init_common_ring(struct intel_engine_cs *engine)
+static void intel_engine_init_hws(struct intel_engine_cs *engine)
{
struct drm_i915_private *dev_priv = engine->i915;
+
+ I915_WRITE(RING_HWSTAM(engine->mmio_base), 0xffffffff);
+ I915_WRITE(RING_MODE_GEN7(engine),
+ _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE));
+ I915_WRITE(RING_HWS_PGA(engine->mmio_base),
+ engine->status_page.ggtt_offset);
+ POSTING_READ(RING_HWS_PGA(engine->mmio_base));
+}
+
+static int gen8_init_common_ring(struct intel_engine_cs *engine)
+{
struct execlist_port *port = engine->execlist_port;
unsigned int n;
int ret;
@@ -1155,13 +1166,7 @@ static int gen8_init_common_ring(struct intel_engine_cs
*engine)
intel_engine_reset_breadcrumbs(engine);
intel_engine_init_hangcheck(engine);
-
- I915_WRITE(RING_HWSTAM(engine->mmio_base), 0xffffffff);
- I915_WRITE(RING_MODE_GEN7(engine),
- _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE));
- I915_WRITE(RING_HWS_PGA(engine->mmio_base),
- engine->status_page.ggtt_offset);
- POSTING_READ(RING_HWS_PGA(engine->mmio_base));
+ intel_engine_init_hws(engine);
DRM_DEBUG_DRIVER("Execlists enabled for %s\n", engine->name);
--
2.7.4
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