On Wed, Jun 21, 2017 at 04:04:03PM +0530, Shashank Sharma wrote:
> CEA-861-F spec adds ycbcr420 deep color support information
> in hf-vsdb block. This patch extends the existing hf-vsdb parsing
> function by adding parsing of ycbcr420 deep color support from the
> EDID and adding it into display information stored.
> 
> V2: Rebase
> V3: Rebase
> V4: Moved definition of y420_dc_modes into this patch, where its used
>     (Ville)
> 
> Cc: Ville Syrjälä <ville.syrj...@linux.intel.com>
> Cc: Jose Abreu <joab...@synopsys.com>
> Signed-off-by: Shashank Sharma <shashank.sha...@intel.com>
> ---
>  drivers/gpu/drm/drm_edid.c  | 15 +++++++++++++++
>  include/drm/drm_connector.h |  3 +++
>  include/drm/drm_edid.h      |  5 +++++
>  3 files changed, 23 insertions(+)
> 
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index 8c7e73b..b4583f6 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -4196,6 +4196,19 @@ drm_default_rgb_quant_range(const struct 
> drm_display_mode *mode)
>  }
>  EXPORT_SYMBOL(drm_default_rgb_quant_range);
>  
> +static void drm_parse_ycbcr420_deep_color_info(struct drm_connector 
> *connector,
> +                                          const u8 *db)
> +{
> +     struct drm_hdmi_info *info = &connector->display_info.hdmi;
> +
> +     if (db[7] & DRM_EDID_YCBCR420_DC_48)
> +             info->y420_dc_modes |= DRM_EDID_YCBCR420_DC_48;
> +     if (db[7] & DRM_EDID_YCBCR420_DC_36)
> +             info->y420_dc_modes |= DRM_EDID_YCBCR420_DC_36;
> +     if (db[7] & DRM_EDID_YCBCR420_DC_30)
> +             info->y420_dc_modes |= DRM_EDID_YCBCR420_DC_30;

y420_dc_modes = db[7] & (...);

will do if you plan to just copy the bits over.

> +}
> +
>  static void drm_parse_hdmi_forum_vsdb(struct drm_connector *connector,
>                                const u8 *hf_vsdb)
>  {
> @@ -4236,6 +4249,8 @@ static void drm_parse_hdmi_forum_vsdb(struct 
> drm_connector *connector,
>                               scdc->scrambling.low_rates = true;
>               }
>       }
> +
> +     drm_parse_ycbcr420_deep_color_info(connector, hf_vsdb);
>  }
>  
>  static void drm_parse_hdmi_deep_color_info(struct drm_connector *connector,
> diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
> index ce2212d..1305fe9 100644
> --- a/include/drm/drm_connector.h
> +++ b/include/drm/drm_connector.h
> @@ -156,6 +156,9 @@ struct drm_hdmi_info {
>  
>       /** @y420_cmdb_map: bitmap of SVD index, to extraxt vcb modes */
>       unsigned long y420_cmdb_map;
> +
> +     /** @y420_dc_modes: bitmap of deep color support index */
> +     u8 y420_dc_modes;
>  };
>  
>  /**
> diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
> index 89c0062..d4ff17c 100644
> --- a/include/drm/drm_edid.h
> +++ b/include/drm/drm_edid.h
> @@ -213,6 +213,11 @@ struct detailed_timing {
>  #define DRM_EDID_HDMI_DC_30               (1 << 4)
>  #define DRM_EDID_HDMI_DC_Y444             (1 << 3)
>  
> +/* YCBCR 420 deep color modes */
> +#define DRM_EDID_YCBCR420_DC_48                (1 << 6)
> +#define DRM_EDID_YCBCR420_DC_36                (1 << 5)
> +#define DRM_EDID_YCBCR420_DC_30                (1 << 4)
> +
>  /* ELD Header Block */
>  #define DRM_ELD_HEADER_BLOCK_SIZE    4
>  
> -- 
> 2.7.4

-- 
Ville Syrjälä
Intel OTC
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