Currently gvt gtt handling doesn't support huge page entries, so disable
for now.
Suggested-by: Zhenyu Wang <zhen...@linux.intel.com>
Signed-off-by: Matthew Auld <matthew.a...@intel.com>
Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Zhenyu Wang <zhen...@linux.intel.com>
---
drivers/gpu/drm/i915/i915_gem.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 183657f9b096..6cb0a3b8988b 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4846,6 +4846,15 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
mutex_lock(&dev_priv->drm.struct_mutex);
+ /* If the guest supports the 48b PPGGT, then we need to fallback to 4K
+ * pages, since gvt gtt handling doesn't support huge page entries - we
+ * need to check either hypervisor mm can support huge guest page or
+ * just do emulation in gvt.
+ */
+ if (USES_FULL_48BIT_PPGTT(dev_priv) && intel_vgpu_active(dev_priv))
+ mkwrite_device_info(dev_priv)->page_size_mask =
+ I915_GTT_PAGE_SIZE_4K;
+
dev_priv->mm.unordered_timeline = dma_fence_context_alloc(1);
if (!i915.enable_execlists) {
--
2.9.4
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