On Friday 14 July 2017 01:29 AM, Paulo Zanoni wrote:
Em Sex, 2017-04-28 às 20:07 +0530, Praveen Paneri escreveu:
From: Akash Goel <akash.g...@intel.com>
v2: Moved identical code into a single function (Paulo)
My MI-fu is not very strong, but I tried to check this against BSpec
and I believe this patch is correct. I also tested it, and it
definitely solves the problems with the BLT operations on Y tiling.
There's only a minor nitpick with a line going beyond 80 columns, but I
can fix that while applying.
Reviewed-by: Paulo Zanoni <paulo.r.zan...@intel.com>
Thanks
Praveen
Signed-off-by: Akash Goel <akash.g...@intel.com>
Signed-off-by: Praveen Paneri <praveen.pan...@intel.com>
---
lib/igt_draw.c | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/lib/igt_draw.c b/lib/igt_draw.c
index fcf8fba..27a69cd 100644
--- a/lib/igt_draw.c
+++ b/lib/igt_draw.c
@@ -31,6 +31,7 @@
#include "igt_core.h"
#include "igt_fb.h"
#include "ioctl_wrappers.h"
+#include "i830_reg.h"
/**
* SECTION:igt_draw
@@ -242,6 +243,34 @@ static void set_pixel(void *_ptr, int index,
uint32_t color, int bpp)
}
}
+static void switch_blt_tiling(struct intel_batchbuffer *batch,
uint32_t tiling, bool on)
+{
+ uint32_t bcs_swctrl;
+
+ /* Default is X-tile */
+ if (tiling != I915_TILING_Y)
+ return;
+
+ bcs_swctrl = (0x3 << 16) | (on ? 0x3 : 0x0);
+
+ /* To change the tile register, insert an MI_FLUSH_DW
followed by an
+ * MI_LOAD_REGISTER_IMM
+ */
+ BEGIN_BATCH(4, 0);
+ OUT_BATCH(MI_FLUSH_DW | 2);
+ OUT_BATCH(0x0);
+ OUT_BATCH(0x0);
+ OUT_BATCH(0x0);
+ ADVANCE_BATCH();
+
+ BEGIN_BATCH(4, 0);
+ OUT_BATCH(MI_LOAD_REGISTER_IMM);
+ OUT_BATCH(0x22200); /* BCS_SWCTRL */
+ OUT_BATCH(bcs_swctrl);
+ OUT_BATCH(MI_NOOP);
+ ADVANCE_BATCH();
+}
+
static void draw_rect_ptr_linear(void *ptr, uint32_t stride,
struct rect *rect, uint32_t color,
int bpp)
{
@@ -487,6 +516,8 @@ static void draw_rect_blt(int fd, struct cmd_data
*cmd_data,
blt_cmd_tiling = (tiling) ? XY_COLOR_BLT_TILED : 0;
pitch = (tiling) ? buf->stride / 4 : buf->stride;
+ switch_blt_tiling(batch, tiling, true);
+
BEGIN_BATCH(6, 1);
OUT_BATCH(XY_COLOR_BLT_CMD_NOLEN | XY_COLOR_BLT_WRITE_ALPHA
|
XY_COLOR_BLT_WRITE_RGB | blt_cmd_tiling |
blt_cmd_len);
@@ -497,6 +528,8 @@ static void draw_rect_blt(int fd, struct cmd_data
*cmd_data,
OUT_BATCH(color);
ADVANCE_BATCH();
+ switch_blt_tiling(batch, tiling, false);
+
intel_batchbuffer_flush(batch);
intel_batchbuffer_free(batch);
}
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