On Thu, 26 Jul 2012 20:48:33 +0200
Daniel Vetter <daniel.vet...@ffwll.ch> wrote:

> Simply to make the ilk+ crtc disable path clearer and more symmetric
> with the enable function.
> 
> Also switch to intel_crtc for the enable function.
> 
> Signed-Off-by: Daniel Vetter <daniel.vet...@ffwll.ch>
> ---
>  drivers/gpu/drm/i915/intel_display.c |   57
> ++++++++++++++++++++-------------- 1 file changed, 33 insertions(+),
> 24 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c index 7224055..1d5a811 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2708,11 +2708,10 @@ static void ivb_manual_fdi_link_train(struct
> drm_crtc *crtc) DRM_DEBUG_KMS("FDI train done.\n");
>  }
>  
> -static void ironlake_fdi_pll_enable(struct drm_crtc *crtc)
> +static void ironlake_fdi_pll_enable(struct intel_crtc *intel_crtc)
>  {
> -     struct drm_device *dev = crtc->dev;
> +     struct drm_device *dev = intel_crtc->base.dev;
>       struct drm_i915_private *dev_priv = dev->dev_private;
> -     struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>       int pipe = intel_crtc->pipe;
>       u32 reg, temp;
>  
> @@ -2753,6 +2752,35 @@ static void ironlake_fdi_pll_enable(struct
> drm_crtc *crtc) }
>  }
>  
> +static void ironlake_fdi_pll_disable(struct intel_crtc *intel_crtc)
> +{
> +     struct drm_device *dev = intel_crtc->base.dev;
> +     struct drm_i915_private *dev_priv = dev->dev_private;
> +     int pipe = intel_crtc->pipe;
> +     u32 reg, temp;
> +
> +     /* Switch from PCDclk to Rawclk */
> +     reg = FDI_RX_CTL(pipe);
> +     temp = I915_READ(reg);
> +     I915_WRITE(reg, temp & ~FDI_PCDCLK);
> +
> +     /* Disable CPU FDI TX PLL */
> +     reg = FDI_TX_CTL(pipe);
> +     temp = I915_READ(reg);
> +     I915_WRITE(reg, temp & ~FDI_TX_PLL_ENABLE);
> +
> +     POSTING_READ(reg);
> +     udelay(100);
> +
> +     reg = FDI_RX_CTL(pipe);
> +     temp = I915_READ(reg);
> +     I915_WRITE(reg, temp & ~FDI_RX_PLL_ENABLE);
> +
> +     /* Wait for the clocks to turn off. */
> +     POSTING_READ(reg);
> +     udelay(100);
> +}
> +
>  static void cpt_phase_pointer_disable(struct drm_device *dev, int
> pipe) {
>       struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -3200,7 +3228,7 @@ static void ironlake_crtc_enable(struct
> drm_crtc *crtc) is_pch_port = intel_crtc_driving_pch(crtc);
>  
>       if (is_pch_port)
> -             ironlake_fdi_pll_enable(crtc);
> +             ironlake_fdi_pll_enable(intel_crtc);
>       else
>               ironlake_fdi_disable(crtc);
>  
> @@ -3303,26 +3331,7 @@ static void ironlake_crtc_disable(struct
> drm_crtc *crtc) /* disable PCH DPLL */
>       intel_disable_pch_pll(intel_crtc);
>  
> -     /* Switch from PCDclk to Rawclk */
> -     reg = FDI_RX_CTL(pipe);
> -     temp = I915_READ(reg);
> -     I915_WRITE(reg, temp & ~FDI_PCDCLK);
> -
> -     /* Disable CPU FDI TX PLL */
> -     reg = FDI_TX_CTL(pipe);
> -     temp = I915_READ(reg);
> -     I915_WRITE(reg, temp & ~FDI_TX_PLL_ENABLE);
> -
> -     POSTING_READ(reg);
> -     udelay(100);
> -
> -     reg = FDI_RX_CTL(pipe);
> -     temp = I915_READ(reg);
> -     I915_WRITE(reg, temp & ~FDI_RX_PLL_ENABLE);
> -
> -     /* Wait for the clocks to turn off. */
> -     POSTING_READ(reg);
> -     udelay(100);
> +     ironlake_fdi_pll_disable(intel_crtc);
>  
>       intel_crtc->active = false;
>       intel_update_watermarks(dev);


Looks good.

Reviewed-by: Jesse Barnes <jbar...@virtuousgeek.org>
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