On 2 November 2017 at 16:29, Lionel Landwerlin <[email protected]> wrote: > Gen8/9 aren't very different and we can merge some of this code. > > Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Matthew Auld <[email protected]> _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
- [Intel-gfx] [PATCH v2 7/9] drm/i915/perf: reuse timestam... Lionel Landwerlin
- [Intel-gfx] [PATCH v2 5/9] drm/i915/perf: enable perf su... Lionel Landwerlin
- [Intel-gfx] [PATCH v2 1/9] drm/i915/perf: complete white... Lionel Landwerlin
- [Intel-gfx] [PATCH v2 8/9] drm/i915: expose eu topology ... Lionel Landwerlin
- Re: [Intel-gfx] [PATCH v2 8/9] drm/i915: expose eu ... Chris Wilson
- Re: [Intel-gfx] [PATCH v2 8/9] drm/i915: expose... Lionel Landwerlin
- Re: [Intel-gfx] [PATCH v2 8/9] drm/i915: expose... Lionel Landwerlin
- [Intel-gfx] [PATCH v2 3/9] drm/i915/perf: refactor perf ... Lionel Landwerlin
- Re: [Intel-gfx] [PATCH v2 3/9] drm/i915/perf: refac... Matthew Auld
- [Intel-gfx] [PATCH v2 9/9] drm/i915/debugfs: reuse max s... Lionel Landwerlin
- [Intel-gfx] ✓ Fi.CI.BAT: success for i915: Cannonlake pe... Patchwork
- [Intel-gfx] ✗ Fi.CI.IGT: failure for i915: Cannonlake pe... Patchwork
