On Thu, Nov 09, 2017 at 02:05:59PM +0200, Juha-Pekka Heikkila wrote:
> This makes intel_plane_atomic_check_with_state() generally shorter.
>
> v2: (Ville Syrjälä) move all rotation related checks from
> intel_plane_atomic_check_with_state into new function
> and don't pass dev_priv pointer around.
>
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikk...@gmail.com>
> ---
> drivers/gpu/drm/i915/intel_atomic_plane.c | 81
> ++++++++++++++++++-------------
> 1 file changed, 48 insertions(+), 33 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c
> b/drivers/gpu/drm/i915/intel_atomic_plane.c
> index 8e6dc15..ffd36fb 100644
> --- a/drivers/gpu/drm/i915/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
> @@ -107,6 +107,53 @@ intel_plane_destroy_state(struct drm_plane *plane,
> drm_atomic_helper_plane_destroy_state(plane, state);
> }
>
> +static bool intel_valid_rotation(const struct drm_plane_state *plane_state)
Maybe "intel_plane_valid_rotation" to make it more obvious what we're
checking here.
> +{
> + struct intel_plane *plane = to_intel_plane(plane_state->plane);
> + struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> +
> + if (plane_state->fb &&
> + drm_rotation_90_or_270(plane_state->rotation)) {
^^^^^^^^^^^^
Messed up alignment.
> + struct drm_format_name_buf format_name;
> +
> + if (plane_state->fb->modifier != I915_FORMAT_MOD_Y_TILED &&
> + plane_state->fb->modifier != I915_FORMAT_MOD_Yf_TILED) {
> + DRM_DEBUG_KMS("Y/Yf tiling required for 90/270!\n");
> + return false;
> + }
> +
> + /*
> + * 90/270 is not allowed with RGB64 16:16:16:16,
> + * RGB 16-bit 5:6:5, and Indexed 8-bit.
> + * TBD: Add RGB64 case once its added in supported format
> + * list.
> + */
> + switch (plane_state->fb->format->format) {
> + case DRM_FORMAT_C8:
> + case DRM_FORMAT_RGB565:
> + DRM_DEBUG_KMS(
> + "Unsupported pixel format %s for 90/270!\n",
> + drm_get_format_name(
> + plane_state->fb->format->format,
> + &format_name));
Here too.
> + return false;
> + default:
> + break;
> + }
> + }
> +
> + /* CHV ignores the mirror bit when the rotate bit is set :( */
> + if (IS_CHERRYVIEW(dev_priv) &&
> + plane_state->rotation & DRM_MODE_ROTATE_180 &&
> + plane_state->rotation & DRM_MODE_REFLECT_X) {
> + DRM_DEBUG_KMS("Cannot rotate and reflect at the same time\n");
> + return false;
> + }
> +
> + return true;
> +
Empty line. IIRC 'checkpatch.pl --strict' should catch these for you.
> +}
> +
> int intel_plane_atomic_check_with_state(const struct intel_crtc_state
> *old_crtc_state,
> struct intel_crtc_state *crtc_state,
> const struct intel_plane_state
> *old_plane_state,
> @@ -137,40 +184,8 @@ int intel_plane_atomic_check_with_state(const struct
> intel_crtc_state *old_crtc_
> intel_state->clip.y2 =
> crtc_state->base.enable ? crtc_state->pipe_src_h : 0;
>
> - if (state->fb && drm_rotation_90_or_270(state->rotation)) {
> - struct drm_format_name_buf format_name;
> -
> - if (state->fb->modifier != I915_FORMAT_MOD_Y_TILED &&
> - state->fb->modifier != I915_FORMAT_MOD_Yf_TILED) {
> - DRM_DEBUG_KMS("Y/Yf tiling required for 90/270!\n");
> - return -EINVAL;
> - }
> -
> - /*
> - * 90/270 is not allowed with RGB64 16:16:16:16,
> - * RGB 16-bit 5:6:5, and Indexed 8-bit.
> - * TBD: Add RGB64 case once its added in supported format list.
> - */
> - switch (state->fb->format->format) {
> - case DRM_FORMAT_C8:
> - case DRM_FORMAT_RGB565:
> - DRM_DEBUG_KMS("Unsupported pixel format %s for
> 90/270!\n",
> -
> drm_get_format_name(state->fb->format->format,
> - &format_name));
> - return -EINVAL;
> -
> - default:
> - break;
> - }
> - }
> -
> - /* CHV ignores the mirror bit when the rotate bit is set :( */
> - if (IS_CHERRYVIEW(dev_priv) &&
> - state->rotation & DRM_MODE_ROTATE_180 &&
> - state->rotation & DRM_MODE_REFLECT_X) {
> - DRM_DEBUG_KMS("Cannot rotate and reflect at the same time\n");
> + if (!intel_valid_rotation(state))
> return -EINVAL;
> - }
>
> intel_state->base.visible = false;
> ret = intel_plane->check_plane(intel_plane, crtc_state, intel_state);
> --
> 2.7.4
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
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