I confess I never fully understood that previous calculation,
so maybe this is cannot be called a "fix". But let's follow
the math that is written on Spec so we have get more confident
this is what hardware expect.
Cc: Mika Kahola <mika.kah...@intel.com>
Cc: Manasi Navare <manasi.d.nav...@intel.com>
Cc: James Ausmus <james.aus...@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com>
---
drivers/gpu/drm/i915/intel_dpll_mgr.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index bd608f7f2399..ee690d2f6e54 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -2190,8 +2190,8 @@ static void cnl_wrpll_params_populate(struct
skl_wrpll_params *params,
params->qdiv_mode = (qdiv == 1) ? 0 : 1;
params->dco_integer = div_u64(dco_freq, ref_freq);
- params->dco_fraction = div_u64((div_u64((uint64_t)dco_freq<<15,
(uint64_t)ref_freq) -
- ((uint64_t)params->dco_integer<<15)) *
0x8000, 0x8000);
+ params->dco_fraction = (DIV_ROUND_UP_ULL(dco_freq, ref_freq) -
+ params->dco_integer) * (1 << 15);
}
static bool
--
2.13.6
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